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1 typical application features description 20v 1a buck dc/dc with integrated scap charger and backup regulator the lt c ? 3355 is a complete input power interrupt ride- through dc/dc system. the part charges a supercapacitor while delivering load current to v out , and uses energy from the supercapacitor to provide continuous v out backup power when v in power is lost. the ltc3355 contains a nonsynchronous constant frequency current mode mono - lithic 1a buck switching regulator to provide a 2.7v to 5v regulated output voltage from an input supply of up to 20v. a 1a programmable cc/cv linear charger charges the supercapacitor from v out . when the v in supply drops below the pfi threshold, the devicess constant frequency nonsynchronous current mode 5 a boost switching regulator delivers power from the supercapacitor to v out . a thermal regulation loop maximizes charge current while limiting the die temperature to 110c. the ic has boost, charger and v in programmable current limits . the ltc 3355 is available in a 20-lead 4mm 4mm qfn surface mount package. supercapacitor charger and ride-through power supply backup operation applications n v in voltage range: 3v to 20v n v out voltage range: 2.7v to 5v n 1a current mode buck main regulator n 5a boost backup regulator powered from single supercapacitor n boost regulator operates down to 0.5v for maximum utilization of supercapacitor energy n programmable supercapacitor charge current to 1a with overvoltage protection n charger supports single cell cc/cv battery charging n programmable v in current limit n programmable boost current limit n v in power fail indicator n v cap power good indicator n v out power on reset output n compact 20-lead 4mm 4mm qfn package n ride-through dying gasp supplies n power meters/industrial alarms/solid state drives l, lt , lt c , lt m , linear technology , the linear logo and burst mode are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. 200k 60.4k 1f v ins v in 1f 10f 10f 2.4v scap 1f to 50f 47f v out 4v 1a (max) v in 12v 0.091 2.49m 200k 402k 4.7pf 100k 4 5 7 v inm5 6 pfi buck pfo boost sw1 6.8h 3.3h 15 v out 2 fb 14 v cap 16 17 11 sw2 cfb 19 10 13 9 8 3 20 v cbst i bstpk 12 i chg ltc3355 pfob rstb cpgood en_chg mode 18 intv cc 1a 665k 332k 3355 ta01a 154k 220pf 1 time (seconds) 0 8 10 14 15 3355 ta01b 6 4 5 10 20 2 0 12 v in v out v cap voltage (v) capacitor = 3f i vout = 0.125a ltc 3355 3355fb for more information www.linear.com/ltc3355
2 pin configuration absolute maximum ratings v in , v ins , v inm 5 ........................................................ 22 v v in v ins .................................................................. 0.1 v v sw 1 .......................................................... C0.4 v to 22 v v sw 2 ............................................................ C0.4 v to 6 v v out , intv cc , pfob , rstb , cpgood , v cap ............................................. C0.3 v to 6 v pfi , en _ chg , mode , fb .............................. C0.3 v to 6 v cfb ............................................ C0.3 v to intv cc + 0.3 v i cpgood , i pfob , i rstb ................................................ 1 ma operating junction temperature range ( notes 2, 3) ............................................ C40 c to 125 c storage temperature range .................. C65 c to 150 c (note 1) 20 19 18 17 16 6 7 8 top view 21 gnd uf package 20-lead (4mm 4mm) plastic qfn 9 10 5 4 3 2 1 11 12 13 14 15 pfi fb mode v ins v in v out v cap rstb i chg cfb i bstpk v cbst intv cc sw2 sw2 v inm5 sw1 en_chg cpgood pfob t jmax = 125c, t ja = 47c/w exposed pad (pin 21) is gnd, must be soldered to pcb order information lead free finish tape and reel part marking package description temperature range ltc3355euf#pbf ltc3355euf#trpbf 3355 20-lead (4mm u 4mm) plastic qfn C40c to 125c ltc3355iuf#pbf ltc3355iuf#trpbf 3355 20-lead (4mm u 4mm) plastic qfn C40c to 125c consult lt c marketing for parts specified with wider operating temperature ranges. consult lt c marketing for information on nonstandard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ltc 3355 3355fb for more information www.linear.com/ltc3355
3 electrical characteristics the l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at t a = 25c. v in = 12v unless otherwise noted. (note 2) symbol parameter conditions min typ max units v in v in operating voltage range l 3 20 v i q v in quiescent current v out quiescent current charger off, not switching, v out = 3.3v, no load, in regulation, supercapacitor charged l l 60 110 120 265 215 420 a a v fb fb reference voltage l 0.775 0.825 v fb line regulation v out = 2.7v to 5v 0.1 %/v i fb fb input bias current C20 20 na v vout v out voltage range l 2.7 5 v v out overvoltage limit buck or boost enabled 5.4 5.65 5.95 v v out undervoltage lockout threshold boost enabled 1.8 2 2.2 v v inm5 v in -v inm5 v in > 7v 4.65 v v intvcc intv cc internal voltage power supply 2 5 v v vcap v cap voltage range 0 5 v i vcap v cap current accuracy v cap = 2v, v out = 3.3v, i vcap = 1a en_chg = high C10 10 % v cap programmable current range en_chg = high 0.1 1 a v ichg i chg reference voltage en_chg = high 0.78 0.82 v r ichg i chg set resistor range 60.4 604 k i cfb cfb input bias current C20 20 na v cfb cfb reference voltage en_chg = high 0.78 0.8 0.82 v cfb hysteresis en_chg = high 30 mv cfb overvoltage hysteretic comparator switch point cfb rising cfb falling v cfb +0.035 v cfb v v i icl v in input current limit v ins -v in to disable charger v ins -v in to disable buck 37 42 43 50 mv mv v ins(cmi) v ins common mode range 3.0 20 v f sw switching frequency fb 0.5v 0.75 1 1.25 mhz foldback frequency (buck only) fb 0.3v 100 khz v pfi pfi falling threshold l 0.775 0.8 0.825 v pfi hysteresis 17 mv i pfi pfi leakage current C20 20 na 1a buck regulator i sw1 sw1 peak current pwm mode (note 5) burst mode ? (note 5) 1.3 1.65 0.5 2 a a t ss soft-start time 1000 s dc max maximum duty cycle fb = 0v 100 % r pmos pmos on-resistance 0.5 1 i leakp pmos leakage current buck disabled C2 2 a ltc 3355 3355fb for more information www.linear.com/ltc3355
4 electrical characteristics the l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at t a = 25c. v in = 12v unless otherwise noted. (note 2) symbol parameter conditions min typ max units 5a boost regulator i vout v out quiescent current v out = 3.3v, no load, in regulation, no switching, burst mode l 80 160 280 a i sw2 sw2 peak current r ibstpk = 200k, pwm mode r ibstpk = 200k, burst mode 4.5 5 1.5 5.5 a a r nmos nmos on-resistance 70 m i leakn nmos leakage current boost disabled C5 5 a dc max boost maximum duty cycle 88 92 98 % v sboost boost input supply voltage range 0.75 5 v boost minimum input supply v out(max) = 4v 0.5 v a v boost error amplifier voltage gain (note 5) 850 v/v g m boost error amplifier transconductance 27 s v ibstpk i bstpk reference voltage 0.775 0.825 v r ibstpk i bstpk set resistor range 200 1000 k logic (mode, en_chg, cpgood, rstb, pfob) v il input low logic voltage mode, en_chg 0.4 v v ih input high logic voltage mode, en_chg 1.2 v i il , i ih input low/high current mode, en_chg -1 1 a v ol output logic low voltage pfob, cpgood, rstb; sink 100a 50 mv i oh logic high leakage current pfob, cpgood, rstb; 5v 1 a cpgood rising threshold v cap as a % of final target 90 92.5 95 % cpgood hysteresis ?v cap as a % of final value 2.5 % rstb falling threshold v out as a % of final target 90 92.5 95 % rstb hysteresis ?v out as a % of final value 2.5 % rstb delay 250 ms note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltc3355 is tested under pulsed load conditions such that t j t a . the ltc3355e is guaranteed to meet specifications from 0c to 85c junction temperature. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the ltc3355i is guaranteed over the C40c to 125c operating junction temperature range. note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. the junction temperature (t j , in c) is calculated from the ambient temperature (t a , in c) and power dissipation (p d , in watts) according to the formula: t j = t a + (p d ? ja ) where ja = 47c/w for the uf package. note 3: the ltc3355 has a thermal regulation loop that limits the maximum junction temperature to 110c by limiting the charger current. note 4: the current limit features of this part are intended to protect the ic from short-term or intermittent fault conditions. continuous operation above the maximum specified pin current may result in device degradation or failure. note 5: guaranteed by design and/or correlation to static test. note 6: the ltc3355 has a thermal shutdown that will shut down the part when the die temperature reaches 155c. ltc 3355 3355fb for more information www.linear.com/ltc3355
5 typical performance characteristics maximum boost load current buck switch voltage drop buck efficiency boost efficiency maximum buck load current t a = 25c unless otherwise noted oscillator frequency vs temperature buck frequency vs feedback voltage typical minimum buck input voltage (v out = 3.3v) switch current (ma) 0 0 sw voltage drop (mv) 100 300 400 500 700 100 500 700 3355 g05 200 600 400 900 1000 200 300 600 800 load current (a) 0 efficiency (%) 60 80 100 0.8 3355 g01 40 20 50 70 90 30 10 0 0.2 0.4 0.6 0.1 0.9 0.3 0.5 0.7 1.0 v in = 18v v in = 12v v in = 6v v out = 4v mode = high load current (a) 0 efficiency (%) 60 80 100 0.8 3355 g02 40 20 50 70 90 30 10 0 0.2 0.4 0.6 0.1 0.9 0.3 0.5 0.7 1.0 v out = 3.3v v out = 4v v out = 5v v cap = 2.4v mode = high v in (v) 4 0 load current (a) 0.20 0.40 0.60 0.80 8 12 16 20 3355 g03 1.00 1.20 6 10 14 18 v out = 4v l = 6.8h input current set resistor = 0 v cap (v) 0.75 load current (a) 0.8 1.0 1.2 3.75 3355 g04 0.6 0.4 0 2.25 1.25 1.75 2.75 3.25 0.2 v out = 4v temperature (c) ?50 frequency (khz) 1150 25 3355 g06 1000 900 ?25 0 50 850 800 1200 1100 1050 950 75 100 125 fb (v) 0 frequency (khz) 600 800 1000 0.4 3355 g07 400 200 500 700 900 300 100 0 0.1 0.2 0.3 0.05 0.45 0.15 0.25 0.35 0.5 v out load current (ma) 1 3.8 input voltage (v) 4.2 4.6 10 100 1000 3355 g08 3.4 3.6 4.0 4.4 3.2 3.0 v out = 3.3v l = 6.8h input current set resistor = 0.05 typical minimum buck input voltage (v out = 5v) v out load current (ma) 1 5.5 v in (v) 5.9 6.3 10 100 1000 3355 g09 5.1 5.3 5.7 6.1 4.9 4.7 4.5 v out = 5v l = 6.8h input current set resistor = 0.05 ltc 3355 3355fb for more information www.linear.com/ltc3355
6 buck line regulation buck switch current limit vs temperature boost load regulation boost switch current limit vs temperature v out vs v ins -v in charge current vs v ins -v in charge current vs v out -v cap charge current vs junction temperature buck load regulation typical performance characteristics t a = 25c unless otherwise noted temperature (c) ?50 current (a) 5.1 25 3355 g10 4.8 4.6 ?25 0 50 4.5 4.4 5.2 v out = 3.3v v out = 4v v out = 5v 5.0 4.9 4.7 75 100 125 temperature (c) ?50 ?25 1.4 current (a) 1.5 1.8 0 50 75 1.7 1.6 25 100 125 3355 g11 v out = 5v v in = 12v v out = 4v v out = 3.3v v ins -v in (mv) 40 v out (v) 2.0 2.5 3.0 4948 3355 g12 1.5 1.0 0 42 44 46 41 50 43 45 47 0.5 4.0 3.5 v in = 7v v out = 3.3v i vout = 200ma v ins -v in (mv) 0 charge current (ma) 400 800 1200 200 600 1000 34 38 42 46 3355 g13 50 3230 36 40 44 48 v in = 7v v out = 3.3v v out -v cap (mv) 0 0 charge current (ma) 200 400 600 800 200 400 600 800 3355 g14 1000 1200 100 300 500 700 r ichg = 60.4k r ichg = 604k v in = 7v v out = 3.3v temperature (c) ?50 charge current (ma) 200 250 300 25 75 3355 g15 150 100 ?25 0 50 100 125 50 0 load current (a) 0 v out (v) 4.030 4.040 4.050 0.8 3355 g16 4.020 4.010 4.025 4.035 4.045 4.015 4.005 4.000 0.2 0.4 0.6 0.1 0.9 0.3 0.5 0.7 1.0 v in = 18v v in = 12v v in = 6v pwm mode v in (v) 5 v out (v) 4.030 4.040 4.050 10 3355 g17 4.020 4.010 4.025 4.035 4.045 4.015 4.005 4.000 15 6 11 16 7 12 17 8 9 13 14 18 19 20 i out = 50ma pwm mode i out = 500ma load current (a) 0.001 4.020 v out (v) 4.025 4.030 4.035 4.040 0.01 0.1 1 3355 g18 4.015 4.010 4.005 4.000 4.045 4.050 v cap = 3.6v v cap = 2.4v v cap = 1.5v pwm mode ltc 3355 3355fb for more information www.linear.com/ltc3355
7 boost line regulation logic input threshold vs temperature (en_chg, mode) pfi threshold vs temperature typical performance characteristics t a = 25c unless otherwise noted buck load step pwm v cap (v) 0.75 v out (v) 4.030 4.040 4.050 2.75 3355 g19 4.020 4.010 4.025 4.035 4.045 4.015 4.005 4.000 1.25 1.75 2.25 3.25 3.75 500ma pwm mode 50ma temperature (c) ?50 threshold (mv) 950 25 3355 g20 800 700 ?25 0 50 650 600 1000 900 850 750 75 100 125 temperature (c) ?50 790 threshold (mv) 795 800 805 810 ?25 0 25 50 3355 g21 75 100 125 v out 100mv/div ac-coupled load current 500ma/div 50s/div load step = 100ma to 600ma v in = 12v v out = 4v 3355 g22 boost load step pwm buck load step burst mode operation boost load step burst mode operation boost error amplifier voltage gain vs temperature boost error amplifier transconductance vs temperature v out 100mv/div ac-coupled load current 500ma/div 50s/div load step = 100ma to 600ma v in = 12v v out = 4v 3355 g23 v out 100mv/div ac-coupled load current 500ma/div 50s/div load step = 100ma to 600ma v cap = 2.4v v out = 4v 3355 g24 v out 100mv/div ac-coupled load step 500ma/div 50s/div load step = 100ma to 600ma v cap = 2.4v v out = 4v 3355 g25 temperature (c) ?50 550 gain (v/v) 600 650 700 750 ?25 0 25 50 3355 g30 75 100 125 temperature (c) ?50 20 transconductance (s) 21 23 24 25 30 27 0 50 75 100 3355 g27 22 28 29 26 ?25 25 125 ltc 3355 3355fb for more information www.linear.com/ltc3355
8 pin functions pfi (pin 1): input to the power-fail comparator. the input voltage below which the pfob pin indicates a power-fail condition can be programmed by connecting this pin to an external resistor divider between v in and ground. fb (pin 2): sets the v out voltage for both the buck and boost voltage control loops via an external resistor divider. the reference voltage is 0.8v. mode (pin 3): this pin sets the buck and boost switch- ing modes. a low is pwm mode, a high is burst mode operation. v ins (pin 4): input current limit sense voltage pin. con- nect a sense resistor from v ins to v in . must be locally bypassed with a low esr ceramic capacitor. connect to v in if input current limit is not needed. v in (pin 5): input power pin supplies current to the in- ternal regulator and buck power switch. must be locally bypassed with a low esr ceramic capacitor. v inm5 (pin 6): this pin is used to filter an internal supply regulator which generates a voltage of v in C 4.65 v. con- nect a 1f ceramic capacitor from v inm5 to v in . sw1 (pin 7): buck output of the internal power switch. connect this pin to the catch diode and inductor. minimize trace area at this pin to reduce emi. en_chg (pin 8): a high on this pin enables the superca - pacitor charger. cpgood (pin 9): open-drain output is high impedance when the v cap voltage is higher than 92.5% of the pro- grammed voltage. pfob (pin 10): open drain of the power-fail comparator. pulled low and enables the boost converter when the pfi input has determined that the input supply has dropped out . cfb (pin 11): this pin is used to program the v cap volt- age via an external resistor divider. the reference voltage is 0.8v. i chg (pin 12): this pin programs the v cap charge current by connecting a resistor to ground. rstb (pin 13): open-drain reset output is high imped- ance when the v out voltage is higher than 92.5% of the programmed regulation voltage. v cap (pin 14): this pin is the constant current, constant voltage linear charger output and connects to the super - capacitor. v out ( pin 15): the output voltage supply . the buck powers this supply from v in when the input voltage is present and the boost powers this supply from v cap when the input voltage has dropped out. sw2 (pin 16, 17): boost output of the internal power switch. connect these pins to the rectifier diode and inductor. minimize trace area at these pins to reduce emi. intv cc ( pin 18): this pin is used to filter an internal supply . connect a 1f ceramic capacitor from this pin to ground. intv cc is 2.5v during start-up until v out exceeds 2.5v then intv cc follows v out . v cbst ( pin 19): this pin is the output of the boost internal error amplifier. the voltage on this pin controls the peak switch current for the boost regulator. connect an rc series network from this pin to ground to compensate the boost control loop. i bstpk (pin 20): this pin programs the boost peak current limit by connecting a resistor to ground. gnd ( exposed pad pin 21): ground . the exposed pad must be connected to a continuous ground plane on the second layer of the printed circuit board by several vias directly under the part to achieve optimum thermal conduction. ltc 3355 3355fb for more information www.linear.com/ltc3355
9 simplified block diagram + ? logic cap reg start-up buck v in v in boost i lim uvlo vc v in sw1 0.8v clk ovp en fb enb ss 0.8v 0.8v i bstpk r6 l2 3355 f01 r c c c + ? + ? + ? 5 mode v inm5 intv cc c vinm5 3 fb 2 6 v out 15 1 7 v ins 4 sw2 16 sw2 17 v cbst 1a d1 r1 r2 r sense c vin c out v out v in ovp enb mode fb clk logic cc/cv charger i out en v ref bilim v to i c in main input supply c1 scap r4 r3 r5 20 19 v cap 14 i ref i chg 12 en_chg 0.8v 8 cfb 11 intv cc 18 enb en 0.8v pfi r8 10 pfob v logic cpgood ovp uvlo + ? 0.8v + ? 0.74v + ? 9 rstb fb 0.74v + ? 13 d clk 250ms delay r7 d2 l1 5a figure 1. ltc3355 block diagram ltc 3355 3355fb for more information www.linear.com/ltc3355
10 operation the ltc 3355 is a 1 a buck regulator with a built - in backup boost converter to allow temporary backup, or ride-through, of v out during a sudden loss of v in power. the device contains all functions necessary to provide seamless charging of a supercapacitor ( or other storage element ), monitoring of v in , v out and v cap , and automatic switch-over to backup power. when the buck is disabled an internal circuit blocks reverse current between v out and v in . start-up when the part first starts up the only voltage available is v in since v out and v cap are at zero volts. an internal 2.5v regulator powers intv cc from v in during start-up. intv cc powers all of the low voltage circuits . the buck regulator is enabled and will drive v out positive through an inductor until the feedback voltage at fb equals 0.8v. when v out exceeds 2.5v intv cc will exactly track v out and the current for the internal low voltage circuits will now be supplied from v out instead of v in . a 1f external ceramic capacitor is required for intv cc to filter internal switching noise. buck switching regulator the ltc3355 uses a 1mhz constant frequency peak cur - rent mode nonsynchronous monolithic buck regulator with internal slope compensation to control the voltage at v out when v in is available. an error amplifier compares the divided output voltage at fb with a reference voltage of 0.8v and adjusts the peak inductor current accordingly. burst mode operation can also be selected to optimize ef- ficiency at low load currents via the mode pin. the buck is in pwm mode when the mode pin is low and in burst mode operation when the mode pin is high. the buck is internally compensated and can operate over an input voltage range of 3v to 20v. an internal soft-start ramp limits inrush current during start-up. frequency foldback protection helps to prevent inductor current runaway during start-up or short- circuit conditions. input current limit the (optional ) input current limit is programmed via an external sense resistor connected between v ins and v in . as the input current limit is reached the charge current will be reduced. if the charge current has been reduced to zero and the input current continues to increase the buck regulator current drive capability will be reduced. the maximum sense voltage is 50mv. the input current limit includes the ltc 3355 quiescent current for high accuracy over a wide current range. boost switching regulator when v in is not available, a monolithic 1mhz constant frequency peak current mode boost regulator with internal slope compensation is enabled and the buck regulator is disabled via the pfi pin. the boost regulator uses the voltage stored at v cap as an input supply and regulates the v out voltage. an error amplifier compares the divided output voltage at fb with a reference voltage of 0.8v and adjusts the peak inductor current accordingly. the i bstpk pin sets the peak boost current over a range of 1a to 5a allowing for lower current backup applications. the boost switching regulator is compensated by adding a series rc network from the v cbst pin to ground. the boost regulator can operate over an input voltage range (v cap ) of 0.5v to 5v. the boost regulator uses the same feedback pin and error amplifier as the buck and regulates to the same v out voltage. the mode pin is used to control the boost switching regulator mode. the boost is in pwm mode when the mode pin is low and in burst mode operation when the mode pin is high. in pwm mode as the load current is decreased, the switch turns on for a shorter period each cycle. if the load current is further decreased, the boost converter will skip cycles to maintain output voltage regulation. charger the supercapacitor is charged by an internal 1a constant current / constant voltage linear charger that supplies current from v out to v cap . the charger will be enabled when v in is above a programmable voltage via the pfi pin, when the en_chg pin is high and when v out is in regulation. the value of the resistor on the i chg pin de- termines the charger current. an internal amplifier servos the i chg voltage to 0.8v to create the reference current for the charge. the v cap voltage is divided down by an external resistor divider that is connected to the cfb pin. a hysteretic comparator compares the cfb voltage to a ltc 3355 3355fb for more information www.linear.com/ltc3355
11 operation 0.8v reference voltage and turns the charger off when these voltages are the same. the v cap voltage represents the fully charged supercapacitor voltage available to sup- ply the boost regulator when v in has dropped out. when cfb decays to 30mv below the cfb reference voltage the charger will be turned on. the ltc3355 includes a soft- start circuit to minimize the inrush current at the start of charge. when the charger is enabled, the charge current ramps from zero to full - scale over a period of approximately 1ms. this has the effect of minimizing the transient load current on v out . the v cap output also has an overvoltage protection cir - cuit which monitors the cfb voltage. if the cfb voltage increases above the cfb reference voltage by 35mv a hysteretic comparator switches in an 8k resistor from v cap to ground. this will bleed any excess charge from the supercapacitor . when the cfb voltage decays to the cfb reference voltage the comparator will remove the 8k bleed resistor. excess charge can come from leakage currents associated with the boost rectifier diode. v in status monitor the pfi input always monitors the v in voltage and de- termines when v in is in dropout. v in is divided down by an external resistor divider and this voltage is then compared to a reference voltage of 0.8v. if the pfi volt- age is below the reference voltage the buck regulator and the charger will be disabled and the boost regulator will be enabled. the pfob pin is a 5v open-drain output. this pin is driven internally by the pfi comparator. when the pfi comparator determines that v in has dropped out the pfob output switches low. pfob is normally connected to a low voltage supply, via an external pull-up resistor. the pull-up resistor for this output can be connected to v out if another supply is not available. v out status monitor the rstb pin is a 5v open-drain output. an internal comparator determines when v out has reached 92.5% of the programmed regulation voltage which then switches the rstb pin high. rstb is normally connected to a low voltage supply (v out ) via an external pull-up resistor. v cap status monitor the cpgood pin is a 5v open-drain output. an internal comparator determines when v cap has reached 92.5% of the programmed regulation voltage which then switches the cpgood pin high. cpgood is normally connected to a low voltage supply (v out ) via an external pull-up resistor. thermal regulation as the die temperature increases due to internal power dissipation, a thermal regulator will limit the die tem- perature to 110c by reducing the charger current. the thermal regulation protects the ltc3355 from excessive temperature and allows the user to push the limits of the power handling capability of a given circuit board without the risk of damaging the ltc3355. another feature is that the charge current can be set according to typical, rather than worst-case ambient temperatures for a given applica- tion with the assurance that the charger will automatically reduce the charge current in worst-case conditions. thermal shutdown the ltc3355 includes a thermal shutdown circuit in ad- dition to the thermal regulator. if for any reason, the die temperature exceeds 155c, the entire part shuts down. the part will resume normal operation once the temperature drops about 15c, to approximately 140c. v out overvoltage, undervoltage lockout the ltc3355 includes an overvoltage protection circuit to ensure that v out does not exceed 5.65v (nominal). an internal resistor divider from v out is connected to an amplifier that will regulate v out as the overvoltage limit is reached. the ltc3355 includes undervoltage lockout which disables the boost when v out is < 2v typical. ltc 3355 3355fb for more information www.linear.com/ltc3355
12 applications information fb resistor network the v out voltage is programmed with a resistor divider between the v out pin and the fb pin. choose the resistor values according to: r1 = r2 v out 0.8v ? 1 ? ? ? ? ? ? reference designators refer to the block diagram. 1% resistors are recommended to maintain output voltage accuracy. cfb resistor network the v cap voltage is programmed with a resistor divider between the v cap pin and the cfb pin. choose the resistor values according to: r3 = r4 v cap 0.8v ? 1 ? ? ? ? ? ? reference designators refer to the block diagram. 1% resistors are recommended to maintain the capacitor float voltage accuracy. i chg set resistor the charge current at v cap is set by connecting a resistor from i chg to ground . choose the resistor value according to : charger current (amps) = 60400 r5 reference designators refer to the block diagram. 1% resistors are recommended to maintain charge current accuracy. i bstpk set resistor the boost peak current limit is set by connecting a re- sistor from i bstpk to ground. choose the resistor value according to: boost peak current limit (amps) = 1e6 r6 reference designators refer to the block diagram. 1% resistors are recommended to maintain boost peak cur - rent accuracy. pfi resistor network the v in dropout voltage is programmed with a resistor divider between the v in pin and pfi pin. choose the resis- tor values according to: r7 = r8 v in 0.8v ? 1 ? ? ? ? ? ? reference designators refer to the block diagram. 1% resistors are recommended to maintain the pfi threshold voltage accuracy. the v in voltage must be greater than the buck dropout voltage (100% duty cycle) when the pfi level is reached to ensure that v out stays in regulation. input voltage range the minimum input voltage is determined by the dropout of the buck regulator. the dropout is dependent on the maximum load current and the buck internal switch resis- tance. the minimum input voltage due to buck dropout is: v in(min) = v out + (i sw(peak) ? 1) ltc 3355 3355fb for more information www.linear.com/ltc3355
13 applications information buck inductor l1 selection and maximum output current a good starting point for the inductor value is: l = v out + v d ( ) 1.8 f sw where f sw is the switching frequency in mhz, v out is the buck output voltage, v d is the catch diode drop (~0.5v) and l is the inductor value in h. the inductors rms current rating must be greater than the maximum load current and its saturation current should be 30% higher. to keep the efficiency high, the series resistance (dcr) should be less than 0.1, and the core material should be intended for high frequency applications. table 1 lists several inductor vendors. for robust operation and fault conditions (start-up or short - circuit ) and high input voltage (>15 v ), the saturation current should be chosen high enough to ensure that the inductor peak current does not exceed 2.2a. the current in the inductor is a triangle wave with an av- erage value equal to the load current . the peak inductor and switch current is: i sw(peak) = i l(peak) = i out(max) + i l 2 where i l(peak ) is the peak inductor current , i out (max ) is the maximum output load current and ? i l is the inductor ripple current. the ltc3355 limits the switch current in order to protect the part. therefore, the maximum output current that the buck will deliver depends on the switch current limit, the inductor value, the input and output voltages. when the switch is off , the potential across the inductor is the output voltage plus the catch diode drop. this gives the peak-to-peak ripple current in the inductor: i l = 1?dc ( ) v out + v d l f sw where f sw is the switching frequency of the buck, dc is the duty cycle and l is the value of the inductor. to maintain output regulation, the inductor peak current must be less than the buck switch current limit. the maximum output current is: i out(max) = i lim ? i l 2 choosing an inductor value so that the ripple current is small will allow a maximum output current near the switch current limit. table 1. inductor vendors vendor url part series type murata www.murata.com lqh5bpb shielded tdk www.tdk.com lt f 5022t shielded toko www.toko.com fds50xx shielded coilcraft www.coilcraft.com xal40xx, lps40xx shielded sumida www.sumida.com dcrh5d, cdrh6d shielded viashay www.vishay.com ihlp2020 shielded one approach to choosing the inductor is to start with the simple rule above, look at the available inductors, and choose one to meet cost or space goals. then use the equations to check that the buck will be able to deliver the required output current. these equations assume that the inductor current is continuous. discontinuous operation occurs when i out is less than ?i l /2. ltc 3355 3355fb for more information www.linear.com/ltc3355
14 applications information buck input capacitor bypass v in and v ins with a ceramic capacitor of x7r or x5r type. a 10f to 22f ceramic capacitor is adequate for bypassing. note that a larger v ins bypass capacitor may be required if the input power supply source impedance is high or there is significant inductance due to long wires or cables. this can be provided with a lower performance electrolytic capacitor in parallel with the ceramic capacitor. buck regulators draw current from the input supply in pulses with very fast rise and fall times . the input capacitors are required to reduce the resulting voltage ripple at v ins and v in and to force this very high frequency switching into a tight local loop, minimizing emi. the capacitors must be placed close to the ltc3355 pins. output capacitor and output ripple the output capacitor has two essential functions. along with the inductor, it filters the square wave generated by the buck regulator to produce the dc output. in this role it determines the output ripple, and low impedance at the switching frequency is important . the second function is to store energy in order to satisfy transient loads and stabilize the buck regulator control loop. ceramic capacitors have very low equivalent series resistance (esr) and provide the best ripple performance. a good starting value is: c out = f sw 100 v out ? ? ? ? ? ? where f sw is in mhz and c out is the recommended output capacitance in f. use x5r or x7r types. this choice will provide low output ripple and good transient response. when choosing a capacitor look carefully through the data sheet to find out what the actual capacitance is under operating conditions (applied voltage and temperature). a physically larger capacitor, or one with a higher voltage rating, may be required. high performance tantalum or electrolytic capacitors can be used for the output capacitor . low esr is important, so choose one that is intended for use in switching regulators. the esr should be specified by the supplier, and should be 0.05 or less. table 2 lists several capacitor vendors. table 2. capacitor vendors vendor url part series commands panasonic www.panasonic.com ceramic, polymer, tantalum eef series, poscap kemet www.kemet.com ceramic, tantalum t494, t495 murata www.murata.com ceramic avx www.avxcorp.com ceramic, tantalum tps series taiyo yuden www.taiyo-yuden.com ceramic buck catch diode selection the catch diode (d1 in the block diagram) conducts cur - rent only during the switch-off time. the average forward current in normal operation can be calculated from: i d( avg ) = i out (1 C dc) where dc is the duty cycle. the only reason to consider a diode with a larger current rating than necessary for nominal operation is for the case of shorted or overloaded output conditions. for the worst case of shorted output the diode average current will then increase to a value that depends on the switch current limit. if operating at high temperatures select a schottky diode with low reverse leakage current. ltc 3355 3355fb for more information www.linear.com/ltc3355
15 applications information audible noise ceramic capacitors are small, robust and have very low esr. however, ceramic capacitors can sometimes cause problems when used with switching regulators. both the buck and boost can run in burst mode operation and the switching frequency will depend on the load current which at very light loads can excite the ceramic capacitors at audio frequencies, generating audible noise. since the buck and boost operate at lower current limits in burst mode operation, the noise is typically very quiet. use a high performance tantalum or electrolytic at the output if the noise level is unacceptable. buck soft-start when the buck is enabled soft-start is engaged. soft-start reduces the inrush current by taking more time to reach the final output voltage. this is achieved by limiting the buck output current over a 1ms period. boost rectifier diode a schottky rectifier diode (d2 in the block diagram) is recommended for the boost rectifier diode. the diode should have low forward drop at the peak operating current, low reverse current and fast reverse recovery times. the current rating should take into account power dissipation as well as output current requirements. the diode current rating should be equal to or greater than the average forward current which is normally equal to the output current. the reverse breakdown voltage should be greater than the v out voltage plus the peak ringing voltage that is generated at the sw2 pin. generally higher reverse breakdown diodes will have lower reverse currents. refer to table 3 for schottky diode vendors. table 3. schottky diode vendors part number v r (v) i ave (a) v f at 1a (mv) v f at 2a (mv) i r at 5v 85c (a) diodes inc. b130 30 1 460 20 b230 30 2 430 100 rohm rsx201va -30 30 1 360 600 vishay vs-20mq060 60 2.1 boost inductor l2 selection and maximum output current the boost inductor l2 should be 3.3h to ensure fast transfer of power from the buck to the boost after a v in power outage. refer to table 1 for inductor vendors. boost frequency compensation the ltc3355 boost switching regulator uses current mode control to regulate v out . this simplifies loop compensa- tion and ceramic output capacitors can be used. the boost regulator does not require the esr of the output capaci- tor for stability. frequency compensation is provided by the components connected to the v cbst pin. generally a capacitor (c c ) and resistor (r c ) in series to ground are used as shown in the block diagram. loop compensation determines the stability and transient performance . optimizing the design of the compensation network depends on the application and type of output capacitor. a practical approach is to start with one of the circuits in this data sheet that is similar to your applica- tion and tune the compensation network to optimize the performance . stability should then be checked across all ltc 3355 3355fb for more information www.linear.com/ltc3355
16 applications information operating conditions, including load current, input voltage and temperature. figure 2 shows an equivalent circuit for the boost regulator control loop. the error amplifier is a transconductance amplifier with a finite output impedance . the power section consisting of a modulator , power switch and inductor, is modeled as a transconductance amplifier generating an output current proportional to the voltage at the v cbst pin. note that the output capacitor integrates this current, and that the capacitor on the v cbst pin (c c ) integrates the error amplifier output current, resulting in two poles in the loop. in most cases a zero is required and comes from either the esr of the output capacitor or from a resistor r c in series with c c . this simple model works well as long as the inductor value is not too high and the loop crossover frequency is much lower than the switching frequency. a phase lead capacitor across the feedback divider may improve the transient response. a small capacitor from v cbst to ground may have to be added if phase lead is used. low ripple burst mode operation to enhance efficiency at light loads the buck and boost regulator can run in low ripple burst mode operation which keeps the output capacitor charged to the proper voltage while minimizing the input quiescent current. setting the mode pin high sets both the buck and boost into burst mode operation . during burst mode operation , the enabled regulator delivers single cycle bursts of current to the out- put capacitor followed by sleep periods where the power is delivered to the load by the output capacitor. since the power to the output is delivered with single, low current pulses, the output ripple is kept below 15mv for typical applications. as the load current falls towards a no-load condition, the percentage of time in sleep mode increases and the average input current is greatly reduced resulting in high efficiency even at very light loads. at higher load currents the regulators will seamlessly transition into pwm mode. ? + g m = 27s current mode power stage g m = 4mhos 0.8v 3355 f02 gnd v cbst c f c c c pl c out c out output ceramic polymer, tantalum or electrolytic r c r1 r2 esr boost loop 32m sw2 fb figure 2. model for boost loop response ltc 3355 3355fb for more information www.linear.com/ltc3355
17 applications information pcb layout for proper operation and minimum emi, care must be taken during printed circuit board layout. large switched currents flow in the v in , sw1, sw2 and paddle ground pins, the buck catch diode, boost rectifier diode and the input capacitor. the loop formed by these components should be as small as possible. these components, along with the inductors and output capacitor, should be placed on the same side of the circuit board, and their connec- tions should be made on that layer. all connections to gnd should be made at a common star ground point or directly to a local, unbroken ground plane below these components. sw1 and sw2 nodes should be laid out carefully to avoid interference . keep the fb, pfi, i chg , i bstpk , v cbst and cfb nodes small so that the ground traces will shield them from the switching nodes. to keep thermal resistance low, extend the ground plane as much as possible and add thermal vias under and near the paddle. keep in mind that the thermal design must keep the junctions of the ltc3355 below the specified absolute maximum temperature. high temperature considerations the pcb must provide heat sinking to keep the ltc3355 cool . the exposed pad on the bottom of the package may be soldered to a copper area which should be tied to large copper layers below with thermal vias; these layers will spread the heat dissipated by the ltc3355. place additional vias to reduce thermal resistance further. with these steps, the thermal resistance from the die ( or junction ) to ambient can be reduced to ja = 47c/ w or less. with 100 lfpm airflow , this resis- tance can fall by another 25%. the ltc3355 has two thermal circuits . the first thermal circuit is operational when the buck and charger are enabled . if the die temperature exceeds 110c the charge current will be reduced. when the ltc3355 is in boost mode the high current thermal shutdown will turn the boost off when the die temperature reaches 155 c. the high temperature shutdown is active in all modes of operation. typical applications tantalum capacitor charger and ride-through backup supply r6 1m r5 604k c1 1f v ins v in c cap 1f c vin 10f c in 10f 5v 1000f 6.3v tant 47f v out 5v 10ma v in 12v r s 1 r7 2.49m r8 200k r1 523k r2 100k d2 d1 4 5 7 v inm5 6 pfi buck pfo boost sw1 l1 6.8h l2 3.3h 15 v out 2 fb 14 v cap 16 17 11 sw2 cfb 19 10 13 9 8 3 20 v cbst i bstpk 12 i chg ltc3355 pfob rstb cpgood en_chg mode 18 intv cc r3 1.05m r4 200k 3355 ta02 r c 154k c c 220pf 1 + ltc 3355 3355fb for more information www.linear.com/ltc3355
18 package description please refer to http://www .linear.com/designtools/packaging/ for the most recent package drawings. 4.00 0.10 4.00 0.10 note: 1. drawing is proposed to be made a jedec package outline mo-220 variation (wggd-1)?to be approved 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 2019 1 2 bottom view?exposed pad 2.00 ref 2.45 0.10 0.75 0.05 r = 0.115 typ r = 0.05 typ 0.25 0.05 0.50 bsc 0.200 ref 0.00 ? 0.05 (uf20) qfn 01-07 rev a recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 0.70 0.05 0.25 0.05 0.50 bsc 2.00 ref 2.45 0.05 3.10 0.05 4.50 0.05 package outline pin 1 notch r = 0.20 typ or 0.35 45 chamfer 2.45 0.10 2.45 0.05 uf package 20-lead plastic qfn (4mm 4mm) (reference ltc dwg # 05-08-1710 rev a) ltc 3355 3355fb for more information www.linear.com/ltc3355
19 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number a 08/14 modified v out overvoltage, undervoltage lockout section modified input voltage range equation modified i chg set resistor section modified i bstpk set resistor section 11 12 12 12 b 4/15 updated conditions for i sw1 , i sw2 and i vout updated units for boost error amplifier transconductance updated units for boost error amplifier transconductance vs temperature graph update tstb (pin 13), cpgood (pin 9), pfob (pin 10) updated block diagram updated cfb resistor network and pfi resistor network updated table 2: capacitor vendors updated boost error amplifier transconductance unit in figure 2 3 and 4 4 7 8 9 12 14 16 ltc 3355 3355fb for more information www.linear.com/ltc3355
20 ? linear technology corporation 2014 lt 0415 rev b ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/ltc3355 related parts typical application nimh trickle charger and ride-through backup supply r6 909k r5 604k c1 1f v ins v in c cap 1f c vin * 10f c in 10f 1.4v nimh 2000mahr 47f v out 3.3v 50ma (max) v in 5v r s * 0.27 r7 931k r8 200k r1 316k r2 100k d2 d1 4 5 7 v inm5 6 pfi buck pfo boost sw1 l1 4.7h l2 3.3h 200 15 v out 2 fb 14 v cap 16 17 11 sw2 cfb 19 10 13 9 8 3 20 v cbst i bstpk 12 i chg ltc3355 pfob rstb cpgood en_chg mode *optional 18 intv cc r3 499k r4 499k 3355 ta03 r c 154k c c 220pf 1 microprocessor 24 hours + part number description comments ltc3225/ ltc3225-1 150ma supercapacitor charger low noise, constant frequency charging of tw o series supercapacitors. automatic cell balancing prevents capacitor overvoltage during charging. programmable charge current (up to 150ma). 2mm 3mm dfn package ltc3226 2-cell supercapacitor charger with backup powerpath? controller 1/2 multimode charge pump supercapacitor charger ideal diode main powerpath? controller, internal 2a ldo back-up supply, 16-lead (3mm 3mm) qfn package lt3485 photoflash capacitor chargers with output voltage monitor and integrated igbt drive integrated igbt driver; voltage output monitor; uses small transformers: 5.8mm 5.8mm 3mm. operates from tw o aa batteries, single cell li-ion or any supply from 1.8v up to 10v. no output voltage divider needed; no external schottky diode required. charges any size photoflash capacitor; 10-lead (3mm 3mm) dfn package ltc3625/ ltc3625-1 1a high efficiency 2-cell supercapacitor charger with automatic cell balancing high efficiency step-up/step-down charging of tw o series supercapacitors. automatic cell balancing prevents capacitor overvoltage during charging. programmable charging current up to 500ma (single inductor), 1a (dual inductor). v in = 2.7v to 5.5v, low no-load quiescent current: 23a. 12-lead 3mm 4mm dfn package lt ? 3750 capacitor charger controller charges any size capacitor; easily adjustable output voltage. drives high current nmos fets; primary-side senseno output voltage divider necessary. wide input range: 3v to 24v; drives gate to v cc C 2v. 10-lead ms package lt3751 high voltage capacitor charger controller with regulation charges any size capacitor; low noise output in voltage regulation mode. stable operation under a no-load condition; integrated 2a mosfet gate driver with rail-to-rail operation for v cc 8 v. wide input v cc voltage range (5v to 24v). 20-pin qfn 4mm 5mm and 20-lead tssop packages ltc4425 supercapacitor charger with current limited ideal diode constant-current/constant- voltage linear charger for 2-cell series supercapacitor stack. v in : li-ion/polymer battery, a usb port, or a 2.7v to 5.5v current-limited supply. 2a charge current, auto cell balancing, 20a quiescent current, shutdown current <2a. low profile 12-pin 3mm 3mm dfn or a 12-lead msop package ltc 3355 3355fb for more information www.linear.com/ltc3355

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